1. Technical Field
The present invention relates in general to data processing systems, and more particularly, to capacity management in data processing systems (such as a data transmission network or a server, alone or together with other components). Still more particularly, the present invention relates to a method and system for analyzing the performance of individual components of the data processing system.
2. Description of the Related Art
Managing a computer system which includes a plurality of devices such as networks or servers is of special interest to data processing (or information technology) personnel. The computer systems typically include a plurality of diverse devices such as memory, disks, local area network (LAN) adapters and central processing units (CPUs) which interact in various interrelated ways when a variety of data processing applications are used in the computer system.
Frequently, the performance of the computer system or network is less than it could be because one or more of the components is not appropriate for application loading of the computer system (or a network or server). It is desirable to know what changes to the computer system would be worthwhile in improving the capacity of the computer system and making those changes while avoiding changes which would not have a significant benefit to the performance of the computer system.
As the systems get larger and more complex, these interactions become hard to define, model or predict. Also, the relationships between the devices, and hence the capacity of the system becomes difficult to manage. These systems are quite expensive to install and changes to the system involve a significant investment. While an investment is desirable which will improve the performance of the computer system, some investments in improvements to the computer system would not be worthwhile since the performance of the overall system would not improve.
The peripheral component interconnect (PCI) specification introduced by Intel Corporation defines a high-performance local bus architecture that supports the installation of PCI-compliant expansion cards. The PCI standard has evolved over a period of years to support a wide assortment of system and hardware component capabilities. “Hardware components” are herein defined as any part of a data processing system and may include data storage devices, communication devices, etc. “Hardware adapters” are hardware components implemented on an adapter card installed on an expansion slot. Hardware adapters can usually be easily moved or replaced while other hardware components may be permanently coupled (soldered) to the data processing system.
Whereas the original PCI bus standard, herein referred to as “conventional mode,” limits bus clock frequency either to 33 MHz or 66 MHz, newer PCI-X hardware adapters, operating in “PCI-X mode,” are capable of bus communication at 66 MHz, 100 MHz or 133 MHz. Available PCI-compatible hardware adapters support either 32-bit wide and 64-bit wide versions of the PCI bus and operate at a variety of supply voltages (e.g., 3.3 V and 5V). Future expansions and revisions of the PCI architecture may include higher supported clock speeds, wider buses, or double-data rate modes of operation, which will result in an even wider array of possible system configurations.
Despite the wide array of implementations, compatibility has been maintained between devices implementing different versions of the PCI bus specification. For example, PCI buses are programmed to operate at the fastest common speed or mode that all hardware components on the bus can support. Hardware components restrict their speed or mode in the presence of buses or hardware components that are not capable of faster operation. In general, hardware components having different characteristics that are coupled to the same PCI bus function properly, but the performance of the faster hardware components is degraded due to the lower bus frequency dictated by the slower hardware components. “System performance” or “performance” is herein defined as the throughput of a data processing system or the total number of users the data processing system can currently support.
The performance of hardware devices on the PCI buses within the system is a key factor in the overall performance of the system. Accordingly, the present invention recognizes that configurations that prevent devices from operating at their maximum capability should be avoided. For example, careless placement of a hardware adapter (e.g., mismatching speeds by placing a 33 MHz hardware adapter on a 133 MHz bus or mixing modes by placing a conventional mode hardware adapter on a PCI-X mode bus) may result in significant performance degradation. A data processing system continues to function despite the less-than-optimum hardware component configuration, so problems with the configuration may only be evident during special circumstances (e.g., intervals of peak demand of the data processing system resources).
System administrators have attempted to solve this problem by looking at performance monitors and conceptualizing the system in their head and adjusting the PCI slot configuration based upon guesses and experience. It was then necessary to monitor the system(s) changes to see if they produced a gain in performance. To successfully detect bottlenecks and solve performance problems, system administrators must have many years of performance analysis experience. Even then, this approach is not reliable.
Simulation programs have solved this problem by containing a model of the system and sometimes the entire network. This requires a large amount of information to be input from the network and from the user. Simulation programs are larger and more complex and hence much more expensive. Simulation programs are also less accurate because the information utilized in the simulation usually cannot be kept up-to-date to accurately reflect the precise operational characteristics of the target system.
Active monitor methods have solved this problem by intentionally inducing performance problems in the network in order to determine performance characteristics. The active monitors that simulate the performance problems may not accurately represent what the applications will do on the network under actual operating conditions. Active monitors also interfere with other traffic in the network and are therefore not appropriate for use at all times.
Commonly owned U.S. patent application Ser. No. 09/253,413 (now U.S. Pat. No. 6,334,168). “System and Method for Monitoring and Analyzing Computer System Performance and Making Recommendations For Improving It,” filed on Feb. 19, 1999, henceforth called Bottleneck Detection, uses an automated method of detecting and diagnosing computer system bottlenecks by utilizing passive monitoring techniques. This method identifies individual components causing bottlenecks and combinations of constrained component types and suggests a remedy. The recommended solution is usually to improve performance by adding to the capabilities of the bottlenecked component(s). However, this technique focused on addition of new components and did not recommend reconfiguration changes to the existing system.
Commonly owned U.S. patent application Ser. No. 09/918,330 (still pending), “System and Method for Identifying One or More Optimum Configurations of a Data Processing System” invention, filed on Jul. 30, 2001, deals with computer systems having PCI buses and is henceforth called PCI Optimization. That application relates to a system which examines PCI adapter configuration and, where possible, recommends an optimal PCI configuration based solely upon the electrical characteristics of the system and the installed adapters. The system of the PCI Optimization application attempts to find alternate configurations that provide the best match of slot and adapter electrical characteristics that are realizable on the PCI bus with the least effort on the part of the system administrator.
There is, however, a need to determine runtime effects that also influence optimal placement of adapters. For example, the PCI Optimization techniques may recommend placing two electrically similar but very busy adapters on a same PCI bus segment. Yet moving one of these adapters to an alternative slot on another PCI bus segment might provide better performance.